As shown in FIG. 1, the chip structure of the conventional primary side regulated converter mainly includes a feedback voltage detecting block 103, a feedback current detecting block 106, a controller 104, a PWM driving block 105, a power supply unit 101 and a HV start-up block 102. Figure (FIG. 2 is a simplified conventional diagram illustrating a switching power converter. The power converter mainly includes a bridge rectifier D0, a filtering capacitor C1, a transformer TR1, a power chip IC1, SW pin of power chip IC1 connected with the primary winding of the transformer, a CS sampling loop connected with the CS pin of power chip IC1, a DC output stage connected with the secondary winding of the transformer, a VDD power supply loop and a feedback loop connected with the auxiliary winding of the transformer. The operating principle of the power converter is as follows: when the output voltage Vout of the DC output stage is lower than the target voltage, the feedback voltage VSENSE decreases, the power supply chip IC1 increases the duty cycle of the switching frequency, and prolongs the on-time of the switching transistor, so as to transfer more energy to the secondary winding of the transformer and raise the output voltage Vout; when the output voltage Vout of the DC output stage is higher than the target voltage, the feedback voltage VSENSE increases, the power supply chip IC1 decreases the duty cycle of the switching frequency, and shortens the on-time of the switching transistor, so as to transfer less energy to the secondary winding of the transformer and decrease the output voltage Vout.
Although the above operation mode can realize stable output, it has worse anti-interference performances for various kinds of transient disturbances caused by transient processes during operations, such as turning on or turning off an inductive load, contact bounce of a relay, and so on. An EFT test is to simulate such disturbances. As shown in FIG. 3, the concrete waveforms during an EFT test are present as a limited number of clear and distinguishable pulse sequences, having characteristics of large transient amplitude, short rise time, high repetition rate and low energy. The effects of the pulse sequences on the operation of the power converter are shown through the waveforms in FIG. 4. Since the pulse sequences have effects on the feedback voltage VSENSE, the chip will sample a false value of feedback voltage VSENSE and make a wrong judgment to decrease the operating frequency of the chip, thereby decreasing the output voltage. When the pulse amplitude reaches a certain value, the sampled value of the feedback voltage VSENSE will be too large, and the chip outputs the allowable minimum frequency according to the false value of feedback voltage VSENSE, as a result, the output voltage is decreased to be lower than the acceptable output voltage, which will influence the regular service of the chip; the concrete wave forms are shown in FIG. 5.